GPIO-MM is part of a family of reconfigurable digital I/O and counter / timer modules with various port and pin configurations. Each board uses identical hardware with a 200K gate Xilinx Spartan II RAM-based FPGA. The varying configurations are based on different FPGA code. The FPGA code is stored in a flash memory on the board, enabling GPIO-MM to be reprogrammed in the field with different designs, including custom designs.
The GPIO-MM configuration provides 48 digital I/O lines and 10 programmable counter/timers. The counter/timer features are based on our legacy Quartz-MM board, while the 48 digital I/O lines are compatible with our legacy Garnet-MM board. This configuration combines the features of both these boards into one board to reduce your PC/104 stack size and cost.
Other GPIO-MM configurations provide up to 96 digital I/O lines.
|GPIO-MM-XT||FPGA I/O, 10 Counters, 48 DIO PC/104 Module|
|GPIO-MM-12-XT||FPGA I/O, 10 Counters, 48 DIO PC/104 Module, Alt Pinout|
|GPIO-MM-21-XT||FPGA I/O, 96 Digital I/O PC/104 Module|